The initial research on the Oxide Thin Film Transistor (OTFT) technology mainly aims to reduce power consumption of active display devices, and make display devices be thinner and lighter and have a faster response speed. The technology starts to step toward a probationary stage in the early 21st century. As a new generation of Organic Light-Emitting Diodes (OLEDs), which has characteristics of being ultrathin, light weight, low power consumption and emitting light per se and can provide a more beautiful color and a clearer image, steps on a practical stage formally. The Oxide Thin Film Transistor technology has been considered to be able to take the place of an existing Low Temperature Poly Silicon (LTPS) technology, especially for application in the field of a large-scale display.
An oxide thin film transistor and a method of manufacturing an array substrate in prior art will be described below with reference to FIG. 1.
FIG. 1 is a cross-sectional view illustrating an existing OTFT array substrate. The existing oxide thin film transistor and the method of manufacturing the array substrate will now being described with reference to FIG. 1.
S101, forming a gate metal layer on a transparent substrate.
During manufacture of TFTs, a gate metal layer is usually fabricated by means of magnetron sputtering. The electrode material can be selected according to different device structures and process requirements, and metals commonly used for gate electrodes are Mo, Mo—Al—Mo alloy, Mo/Al—Nd/Mo stack material, Cu and metal titanium and an alloy thereof, etc.
S102, performing a patterning process on the gate metal layer, so as to form a gate electrode and a gate line.
By means of wet etching, the gate metal layer is subjected to a patterning process.
S103, forming a gate insulating layer on the gate metal layer.
After patterning of the gate metal layer 11, it is cleaned by a Pre-clean process (cleaning prior to film formation). Then, by means of Plasma Enhanced Chemical Vapor Deposition (PECVD), a gate insulating layer 12 is fabricated on the substrate with the gate metal layer. The material for manufacturing the gate insulating layer is widely used, such as, a silicon dioxide (SiO2) thin film, a silicon nitride (SiNx) thin film, a silicon oxynitride (SiOxNy) thin film, an aluminum oxide (Al2O3) thin film, a TiOx thin film and a composite multilayered film of the above thin films.
S104, performing a surface treatment on the gate insulating layer.
During manufacture of a thin film transistor, characteristics of a surface of the gate insulating layer 12 play a very important role in characteristics of the entire TFT, especially for an oxide thin film transistor. A common treating method is that, a plasma is used for treatment or a surface modification is conducted.
S105, forming an oxide semiconductor thin film.
A most key link in manufacture of OTFTs is production of an active layer oxide semiconductor. Main manufacturing methods are magnetron sputtering deposition, solution method, etc. Oxide semiconductors now being widely used are Indium Gallium Zinc Oxide (IGZO), Indium Gallium Tin Oxide (IGTO), Indium Zinc Oxide (IZO) and so on, and composites concerning them which are formed at different ratios.
S106, performing a patterning process on the oxide semiconductor thin film.
The patterning process may be wet etching or dry etching, but use of different methods will do different harms to the oxide semiconductor layer. Therefore, selection of a suitable patterning process is an important way to improve characteristics of OTFTs. After the oxide semiconductor thin film is subjected to the patterning process, an oxide semiconductor active layer 13 is formed.
S107, forming an etch stop thin film and performing a patterning process.
An etch stop thin film is usually patterned by means of dry etching, so as to form an Etch Stop Layer (ESL) 14. Generally, it is necessary that an inorganic insulating material such as SiOx, SiNx, SiOxNy, Al2O3, TiOx or the like be adopted as material for the etch stop layer, and its purpose is to decrease the harm to the oxide semiconductor thin film during patterning of a data-line metal layer.
S108, forming a data-line metal layer.
Firstly, a layer of data-line metal thin film is deposited, and then it is patterned by means of wet etching, so as to form a data line, a data line lead wire, a source electrode (e.g. 15a in FIG. 1) and a drain electrode (e.g. 15b in FIG. 1).
S109, forming a passivation layer and etching a via hole.
After patterning of the source electrode and the drain electrode, a passivation layer 16 is formed on the entire surface. Generally, the passivation layer adopts an inorganic insulating material such as SiOx, SiNx, SiOxNy, Al2O3, TiOx or the like. Etching of a via hole is conducted after formation of the passivation layer, and the formed via hole is denoted by 17 in FIG. 1 and is used to make a pixel electrode which is formed later contact with the drain electrode.
S110, depositing and patterning a pixel electrode layer.
After formation of the via hole, a pixel electrode layer 18, material now being widely used for which is indium tin oxide, is formed, and subjected to a patterning process by means of wet etching.
As can be seen from the above manufacturing method, among existing manufacturing methods of an OTFT array substrate, the most widely adopted one is the foregoing that a six-patterning process is used to form the gate metal layer, the semiconductor layer, the etch stop layer, the data-line metal layer, the passivation-layer via hole and the pixel electrode layer. However, film formation, exposure, etching and other complex procedures after the semiconductor active layer will directly affect properties of the oxide semiconductor thin film; and meanwhile, as the etch stop layer does not fully cover the oxide semiconductor active layer, the etch stop layer cannot protect the oxide semiconductor active layer favorably in processes concerning the oxide semiconductor, and the oxide semiconductor active layer is broken in a process of illumination or etching, to thereby affect device properties of thin film transistors.